1. Technical Field of the Invention
This invention is related to methods, devices and systems for configuring I/O devices. More particularly, this invention relates to dynamically configuring I/O device adapters upon the occurrence of a reset condition. This invention has particular application to I/O device adapters and systems conforming to the PCI (peripheral component interconnect) local bus specification.
2. Description of Related Art
The PCI local bus is an industry standard I/O bus that interconnects computer processor complexes to I/O device adapters. The computer processor complex typically contains a central processing unit (CPU) and system main storage facilities. A PCI I/O device adapter contains hardware, and possibly additional processors and programming to interconnect I/O devices such as disks, computer network interfaces, and so forth, to the processor complex and to control the functions of these I/O devices.
The PCI local bus specification was developed and is controlled by a special interest group formed of a variety of I/O device and computer system vendors that are influential within the personal computer and PC server industry. This specification is defined expressly as a higher performance replacement for the existing standard I/O bus architectures such as the IBM microchannel and extended industry standard architecture (EISA). As such, the PCI local bus specification represents the dominant I/O bus architecture within a very large segment of the computer industry. Furthermore, the PCI local bus specification has been embraced outside of this segment by vendors that participate primarily in other markets, such as enterprise-class network server and mainframe computers. Thus, the scope of computer system and I/O device products that employ PCI local bus implementations is rapidly becoming the majority within the overall computer industry.
FIG. 1 illustrates the basic elements of a conventional PCI local bus implementation including a processor complex 100 having a central processing unit (CPU) 110 and memory 120 interconnected by a processor memory bus 130. The conventional PCI local bus implementation further includes a PCI backplane 200 that is typically a motherboard with a PCI local bus 230, and a PCI connector 205 that interconnect PCI I/O device adapters to the PCI local bus 230.
PCI connectors 205, which may either be a removable-type connector or an embedded, nonremovable connector, are mounted on the PCI local bus backplane 200. The PCI connectors 205 interconnect the PCI local bus 230 and PCI device 240. The implementation shown in FIG. 1 illustrates a removable PCI device 240 that may be easily disconnected from the local bus 230 via a PCI connector 205. The PCI connectors 205 also interconnect the PCI local bus 230 and a PCI multi-function device 260.
PCI card 240 includes an I/O device adapter 250 that behaves as a singular unit on the PCI local bus 230 with respect to its interconnections to PCI local bus 230 and participation in PCI bus signaling protocols. Thus, PCI device 240 and the I/O device adapter 250 are typically referred to as "single function" PCI devices.
The PCI multi-function device 260, on the other hand, includes a plurality of I/O device adapters 252,254. Although the same I/O device adapter 250 may be utilized within the PCI multi-function device 260, reference numerals 252 and 254 are utilized for the I/O device adapters within the multi-function device 250 to indicate additional structure and functionality such as the addition of a processor and memory to implement an I/O processor, or to indicate that the I/O device adapter 252,254 may be unique with respect to the type of I/O device attached thereto.
A function router 270 is included within the PCI multifunction device 260 to interconnect the I/O device adapters 252,254 to the PCI local bus 230. Typically, the function router 270 may be implemented with a multiplexer such that data and/or control signals may be routed between the processor complex 100 and the selected I/O device adapter 252 or 254. The processor complex 100 may individually address the single function PCI device 240 or the PCI multi-function device 260 using a unique device identifier assigned to each PCI local bus connection in which a PCI device 240,260 can be attached. In other words, a unique device identifier is assigned to each slot in which the PCI connector 205 is inserted. This device identifier is the IDSEL, defined by the PCI local bus specification, utilized to uniquely select a desired I/O device on the PCI local bus 230 during PCI configuration read or configuration write signaling protocols. This selection is also performed in the PCI local bus specification by utilizing the configuration read or configuration write signaling protocols defined therein.
The configuration protocol defined within the PCI local bus specification allows the processor complex 100 to individually address each PCI local bus device 250,260 using a physical selection signal that is part of the PCI bus signal definitions. The specification further assigns to each I/O device adapter 250,252,254 a range of processor memory addresses by which the CPU 110 may subsequently communicate with the I/O device adapter 250,252,254.
The PCI multi-function device 260 serves to collect multiple PCI I/O device adapters 252,254 using a single PCI local bus connection. This arrangement is quite practical in that it allows for the evolution from larger physical components to more dense physical integration as components become smaller. Furthermore, this arrangement exploits dense packaging of multiple I/O device adapters 252, 254 to connect an overall increased number of I/O device adapters 252, 254 without adding more connections on the PCI local bus 230 or its backplane 200.
The function router 270 in the PCI multi-function device 260 effectively replaces the two required PCI bus connections with a single PCI bus connection 205. To enable the processor complex 100 to select a particular I/O device adapter 252 or 254 within this multi-function device, the PCI local bus specification configuration protocol appends a function number that ranges in value from 0 to 7 to the device identifier. The PCI local bus specification interchangeably uses the word "function" to refer to the I/O device adapters 250, 252, 254. Single function devices such as PCI device 240 are accommodated in this extended definition by implicitly responding as function zero within the scope of the device ID that selects its PCI bus connection. In essence, the single function PCI device 240 is accommodated within the expanded definition of multi-function device protocols and may be implemented therein by utilizing the function router 270 which merely implements only one function (function zero).
Given that the function number ranges in value from 0 to 7, a PCI multi-function device 260 is then architecturally capable of incorporating up to eight I/O device adapter elements within a single device that requires a single PCI bus connection on the PCI local bus 230. The role of the function router 270 is to facilitate the sharing of the single PCI bus connection amongst the multiple I/O device adapters 252,254 incorporated within the multi-function device 260. In particular, during configuration read and write protocols, the function router 270 uses the function number from this protocol to route the arguments of this protocol between the PCI local bus 230 and the associated PCI I/O device adapter 252 or 254 within the multi-function device 260.
One typical use of a PCI multi-function device 260 is to provide PCI local bus connections to a plurality of I/O device adapters 252,254 and thereby maintain the electrical loads placed on the PCI local bus 230 itself within the allowable limits of the PCI specification. That is, the multi-function device 260 presents a single unit electrical unit load on the PCI local bus 230 while internally allowing for the multiple unit electrical loads associated with a plurality of I/O device adapters 252,254.
A related use of such a device is to allow the I/O device adapters 252,254 to be removable and thereby allow the configuration of the multi-function device 260 to vary, in terms of the number and types of I/O adapter functions that can be detected by the processor complex 100 during PCI configuration processes, according to the specific I/O device adapters 252,254 connected to that multi-function device 260 at any given time. For example, one configuration of such a PCI multi-function device 260 results when a plurality of I/O device adapters 252,254 are connected to the multi-function device 260 and are each detected by the processor complex 100 as individual functions of that multi-function device 260. In such a configuration, each function requires processor complex resources to control that function.
One limitation of the PCI local bus specification is the lack of a device or method to determine the configuration stability of a single-function or multi-function device. This limitation is particularly acute because the configuration of single-function and multi-function devices 240, 260 may change their characteristics at specific points within some process, such as the removal of a connected I/O device adapter or the addition of an I/O device adapter. The ability to remove, add, replace, and reconfigure I/O adapters on a PCI local bus 230 without disruption to the bus 230 or other I/O device adapters sharing that bus is an objective of the PCI special interest group. While this is addressed in this specification for single-function I/O device adapters 240, the limitations of the present PCI multi-function device specification inhibit the ability to render I/O device adapters 252,254 within a PCI multi-function device 260 as removable and otherwise dynamically reconfigurable.
Additionally, one or a series of operations may alter the function configuration of a PCI multi-function device 260 such that functions present in that multi-function device 260 before these operations are no longer present and new functions are present that previously were not. Thus, a PCI multi-function device 260 would benefit from mechanisms that determine when the multi-function device 260 has stabilized its function configuration such that the processor complex 100 may reliably interrogate and otherwise utilize the multi-function device 260 and the new or changed I/O device adapters 252, 254 therein.
As I/O devices typically require a time period in which to stabilize its configuration space with the appropriate configuration parameters, there is a need for a method in which the processor complex 100 determines when the function configuration is stable such that the processor complex 100 may reliably interrogate the new configuration.
Examples of this type of desirable activity which are not found in conventional PCI systems include a single-function device which configures itself based on the external I/O device attached thereto. Another example, mentioned above, is a series of operations that alter the function configuration of a multi-function device. Such operations performed on a PCI multi-function device 260 would benefit from mechanisms for the processor complex 100 to determine when a single or multi-function device has stabilized its function configuration.
In other words, the conventional PCI local bus specification implementation utilizes a static configuration process in which the configuration space within each of the I/O device adapters 250,252,254 is fixed or static at all times. This static configuration is typically implemented with hard-coded configuration space such that the I/O device adapter 252 containing such a hard-coded, static configuration space will always respond or otherwise operate according to the configuration parameters fixed in the configuration space.